1/*  Part of SWI-Prolog
    2
    3    Author:        Jan Wielemaker
    4    E-mail:        J.Wielemaker@vu.nl
    5    WWW:           http://www.swi-prolog.org
    6    Copyright (c)  2019-2021, CWI, Amsterdam
    7                              SWI-Prolog Solutions b.v.
    8    All rights reserved.
    9
   10    Redistribution and use in source and binary forms, with or without
   11    modification, are permitted provided that the following conditions
   12    are met:
   13
   14    1. Redistributions of source code must retain the above copyright
   15       notice, this list of conditions and the following disclaimer.
   16
   17    2. Redistributions in binary form must reproduce the above copyright
   18       notice, this list of conditions and the following disclaimer in
   19       the documentation and/or other materials provided with the
   20       distribution.
   21
   22    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   23    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   24    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   25    FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
   26    COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   27    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   28    BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29    LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
   30    CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31    LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   32    ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   33    POSSIBILITY OF SUCH DAMAGE.
   34*/
   35
   36:- module(prolog_trace,
   37          [ trace/1,                            % :Spec
   38            trace/2,                            % :Spec, +Ports
   39            tracing/2,                          % :Spec, -Ports
   40            notraceall/0
   41          ]).   42:- autoload(library(apply),[maplist/2]).   43:- autoload(library(error),[instantiation_error/1]).   44:- autoload(library(prolog_wrap),[wrap_predicate/4]).   45:- autoload(library(prolog_code), [pi_head/2]).   46
   47
   48/** <module> Print access to predicates
   49
   50This library prints accesses to  specified   predicates  by wrapping the
   51predicate.
   52
   53@see  library(debug)  for  adding  conditional  print  statements  to  a
   54program.
   55*/
   56
   57:- meta_predicate
   58    trace(:),
   59    trace(:, +),
   60    tracing(:, -).   61
   62:- dynamic tracing_mask/2.   63:- volatile tracing_mask/2.   64
   65%!  trace(:Pred) is det.
   66%!  trace(:Pred, +PortSpec) is det.
   67%
   68%   Print passes through _ports_ of  specified   predicates.  Pred is a,
   69%   possible partial, specification of a predicate as it is also used be
   70%   spy/1 and similar predicates. Where   a full predicate specification
   71%   is of the shape `Module:Name/Arity` (or `//Arity for non-terminals),
   72%   both the module and arity may be   omitted in which case Pred refers
   73%   to all matching  predicates.  PortSpec  is   either  a  single  port
   74%   (`call`, `exit`, `fail` or `redo`), preceded with   `+`  or `-` or a
   75%   list  of  these.  The   predicate    modifies   the   current  trace
   76%   specification and then installs a suitable wrapper for the predicate
   77%   using wrap_predicate/4.  For example:
   78%
   79%   ```
   80%   ?- trace(append).
   81%   %     lists:append/2: [all]
   82%   %     lists:append/3: [all]
   83%   %     append/1: [all]
   84%   true.
   85%
   86%   ?- append([a,b], [c], L).
   87%    T Call: lists:append([a, b], [c], _10478)
   88%    T Call: lists:append([b], [c], _11316)
   89%    T Call: lists:append([], [c], _11894)
   90%    T Exit: lists:append([], [c], [c])
   91%    T Exit: lists:append([b], [c], [b, c])
   92%    T Exit: lists:append([a, b], [c], [a, b, c])
   93%   L = [a, b, c].
   94%
   95%   ?- trace(append, -all).
   96%   %     lists:append/2: Not tracing
   97%   %     lists:append/3: Not tracing
   98%   %     append/1: Not tracing
   99%
  100%   @compat This library replaces prior   built-in functionality. Unlike
  101%   the built-in version, ports are printed   regardless  of the `debug`
  102%   flag. The built-in version printed  the   call-stack  depth. That is
  103%   currently not provided by this replacement.
  104
  105trace(Pred) :-
  106    trace(Pred, +all).
  107
  108trace(Pred, Spec) :-
  109    '$find_predicate'(Pred, Preds),
  110    Preds \== [],
  111    maplist(set_trace(Spec), Preds).
  112
  113set_trace(Spec, Pred) :-
  114    (   tracing_mask(Pred, Spec0)
  115    ->  true
  116    ;   Spec0 = 0
  117    ),
  118    modify(Spec, Spec0, Spec1),
  119    retractall(tracing_mask(Pred, _)),
  120    (   Spec1 == []
  121    ->  true
  122    ;   asserta(tracing_mask(Pred, Spec1))
  123    ),
  124    mask_ports(Spec1, Ports),
  125    pi_head(Pred, Head0),
  126    (   predicate_property(Head0, imported_from(M))
  127    ->  requalify(Head0, M, Head)
  128    ;   Head = Head0
  129    ),
  130    (   Spec1 == 0
  131    ->  unwrap_predicate(Head, trace),
  132        print_message(informational, trace(Head, Ports))
  133    ;   wrapper(Spec1, Head, Wrapped, Wrapper),
  134        wrap_predicate(Head, trace, Wrapped, Wrapper),
  135        print_message(informational, trace(Head, Ports))
  136    ).
  137
  138requalify(Term, M, M:Plain) :-
  139    strip_module(Term, _, Plain).
  140
  141modify(Var, _, _) :-
  142    var(Var),
  143    !,
  144    instantiation_error(Var).
  145modify([], Spec, Spec) :-
  146    !.
  147modify([H|T], Spec0, Spec) :-
  148    !,
  149    modify(H, Spec0, Spec1),
  150    modify(T, Spec1, Spec).
  151modify(+Port, Spec0, Spec) :-
  152    !,
  153    port_mask(Port, Mask),
  154    Spec is Spec0 \/ Mask.
  155modify(-Port, Spec0, Spec) :-
  156    !,
  157    port_mask(Port, Mask),
  158    Spec is Spec0 /\ \Mask.
  159modify(Port, Spec0, Spec) :-
  160    port_mask(Port, Mask),
  161    Spec is Spec0 \/ Mask.
  162
  163port_mask(all,  0x0f).
  164port_mask(call, 0x01).
  165port_mask(exit, 0x02).
  166port_mask(redo, 0x04).
  167port_mask(fail, 0x08).
  168
  169mask_ports(0, []) :-
  170    !.
  171mask_ports(Pattern, [H|T]) :-
  172    is_masked(Pattern, H, Pattern1),
  173    mask_ports(Pattern1, T).
  174
  175wrapper(Ports, Head, Wrapped, Wrapper) :-
  176    wrapper(Ports, Head, Id-Level, Wrapped, Wrapped1),
  177    Wrapper = (   prolog_current_frame(Id),
  178                  prolog_frame_attribute(Id, level, Level),
  179                  Wrapped1
  180              ).
  181
  182wrapper(0, _, _, Wrapped, Wrapped) :-
  183    !.
  184wrapper(Pattern, Head, Id, Wrapped, Call) :-
  185    is_masked(Pattern, call, Pattern1),
  186    !,
  187    wrapper(Pattern1, Head, Id, Wrapped, Call0),
  188    Call = (   print_message(debug, frame(Head, trace(call, Id))),
  189               Call0
  190           ).
  191wrapper(Pattern, Head, Id, Wrapped, Call) :-
  192    is_masked(Pattern, exit, Pattern1),
  193    !,
  194    wrapper(Pattern1, Head, Id, Wrapped, Call0),
  195    Call = (   Call0,
  196               print_message(debug, frame(Head, trace(exit, Id)))
  197           ).
  198wrapper(Pattern, Head, Id, Wrapped, Call) :-
  199    is_masked(Pattern, redo, Pattern1),
  200    !,
  201    wrapper(Pattern1, Head, Id, Wrapped, Call0),
  202    Call = (   call_cleanup(Call0, Det = true),
  203               (   Det == true
  204               ->  true
  205               ;   true
  206               ;   print_message(debug, frame(Head, trace(redo, Id))),
  207                   fail
  208               )
  209           ).
  210wrapper(Pattern, Head, Id, Wrapped, Call) :-
  211    is_masked(Pattern, fail, Pattern1),
  212    !,
  213    wrapper(Pattern1, Head, Id, Wrapped, Call0),
  214    Call = call((   call_cleanup(Call0, Det = true),
  215                    (   Det == true
  216                    ->  !
  217                    ;   true
  218                    )
  219                ;   print_message(debug, frame(Head, trace(fail, Id))),
  220                    fail
  221                )).
  222
  223is_masked(Pattern0, Port, Pattern) :-
  224    port_mask(Port, Mask),
  225    Pattern0 /\ Mask =:= Mask,
  226    !,
  227    Pattern is Pattern0 /\ \Mask.
  228
  229%!  tracing(:Spec, -Ports)
  230%
  231%   True if Spec is traced using Ports
  232
  233tracing(Spec, Ports) :-
  234    tracing_mask(Spec, Mask),
  235    mask_ports(Mask, Ports).
  236
  237%!  notraceall is det.
  238%
  239%   Remove all trace points
  240
  241notraceall :-
  242    forall(tracing(M:Spec, _Ports),
  243           trace(M:Spec, -all))